segment registers - definição. O que é segment registers. Significado, conceito
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O que (quem) é segment registers - definição

THE IMPLEMENTATION OF MEMORY SEGMENTATION ON THE X86 ARCHITECTURE
Segment registers; FS and GS; FS/GS; Segment selector; X86 memory segment; Segmented address; Paragraph (computing); Paragraph (Intel); Segment:offset notation (x86); Segment:offset addressing (x86); Segment:offset addressing scheme (x86); Segment:offset (x86); Segment:offset memory addressing (x86); X86 segment:offset addressing; X86 segment:offset addressing scheme; X86 segment:offset; X86 segment:offset memory addressing

Ground segment         
  • Select ground segment facilities worldwide
  • Control center at NASA's [[Jet Propulsion Laboratory]]
  • Radio dishes at an [[Embratel]] earth station in [[Tanguá]], Brazil
GROUND-BASED ELEMENTS OF A SPACECRAFT SYSTEM
Satellite control segment; Ground Segment; Transfer segment; User segment; Ground control segment; Ground control system
A ground segment consists of all the ground-based elements of a space system used by operators and support personnel, as opposed to the space segment and user segment. The ground segment enables management of a spacecraft, and distribution of payload data and telemetry among interested parties on the ground.
Event segment         
Event Segment
A segment of a system variable in computing shows a homogenous status of system dynamics over a time period. Here, a homogenous status of a variable is a state which can be described by a set of coefficients of a formula.
code segment         
  • heap]] sections.
PORTION OF AN OBJECT FILE CONTAINING EXECUTABLE INSTRUCTIONS
Text segment; .text
<memory> (Intel 8086 CS) The area of memory containing the machine code instructions of a program. The code segment of a program may be shared between multiple processes running that code so long as none of them tries to modify it. Unix, confusingly, calls this the "text segment" and the area for uninitialied data, the bss segment. Initialised data is located in the data segment. (1996-12-21)

Wikipédia

X86 memory segmentation

x86 memory segmentation refers to the implementation of memory segmentation in the Intel x86 computer instruction set architecture. Segmentation was introduced on the Intel 8086 in 1978 as a way to allow programs to address more than 64 KB (65,536 bytes) of memory. The Intel 80286 introduced a second version of segmentation in 1982 that added support for virtual memory and memory protection. At this point the original mode was renamed to real mode, and the new version was named protected mode. The x86-64 architecture, introduced in 2003, has largely dropped support for segmentation in 64-bit mode.

In both real and protected modes, the system uses 16-bit segment registers to derive the actual memory address. In real mode, the registers CS, DS, SS, and ES point to the currently used program code segment (CS), the current data segment (DS), the current stack segment (SS), and one extra segment determined by the programmer (ES). The Intel 80386, introduced in 1985, adds two additional segment registers, FS and GS, with no specific uses defined by the hardware. The way in which the segment registers are used differs between the two modes.

The choice of segment is normally defaulted by the processor according to the function being executed. Instructions are always fetched from the code segment. Any stack push or pop or any data reference referring to the stack uses the stack segment. All other references to data use the data segment. The extra segment is the default destination for string operations (for example MOVS or CMPS). FS and GS have no hardware-assigned uses. The instruction format allows an optional segment prefix byte which can be used to override the default segment for selected instructions if desired.